Aiming at the complex communication requirements of the rapid development of integrated circuit industry

a DMA data stream arbiter based on bit-map algorithm is designed.DMA data flow arbiter is composed of channel priority bit-map mapping module

channel request generation module

channel request arbitration module

channel authorization flag generation module and peripheral request response module.After completing the logic design

each function of the circuit is verified by the UVM verification methodology.The verification results show that the design only uses a 32-bit bit-map register to map 32 kinds of priority configurations of 8 channels to the corresponding significant bits

so that the arbitration of DMA requests of 8 channels can be realized.There is no need to configure the priority comparison circuit

and the problem of mutual interference of priority configurations will not be generated due to the step by step comparison.In addition

the circuit area and power consumption can be reduced in the later process of generating the actual circuit.