WANG Guohong, WAN Qiang, YAO Yafeng, et al. A DDS circuit design with ultra-low latency and exact output frequency[J]. 2019, 51(5): 44-49.
DOI:
WANG Guohong, WAN Qiang, YAO Yafeng, et al. A DDS circuit design with ultra-low latency and exact output frequency[J]. 2019, 51(5): 44-49.DOI: 10.11918/j.issn.0367-6234.201805108.
A DDS circuit design with ultra-low latency and exact output frequency
The design of a high-performance and low-cost direct digital frequency synthesizer (DDS) by using complementary metal oxide semiconductor (CMOS) technology is a challenging task. This paper presents a programmable modular and ultra-low latency DDS circuit design. By adding an auxiliary phase-accumulator
the input of the auxiliary accumulator and the analog-digital configuration can be set to generate the fractional composite frequency control word based on the need of the output frequency
so that accurate output of various frequencies can be performed and the output frequency error is completely eliminated. The coordinate rotation digital computer (CORDIC) algorithm was optimized and improved to propose a CORDIC implementation which only needs a small capacity lookup table and simple angle correction. It eliminates the iterative operation process and designs an ultra-low delay phase-amplitude conversion circuit. Under the premise that the circuit resource consumption is not increased
the design circuit not only realized the accurate frequency output
but also greatly reduced the output delay of the circuit. The verification results show that the output frequency of the DDS design circuit did not have a frequency error
and it took only two clock cycles to obtain a high-precision sine cosine wave output. This design improves the phase-accumulator and phase-amplitude conversion circuit
eliminates output frequency error
reduces output delay
and has the advantages such as accurate output frequency
small output delay
and low cost. Therefore
it is more suitable for signal processing applications with high output frequency accuracy and real-time performance.