The IEEE 802.11n SOC requests high throughput and multi-rate encoder and decoder in channel coding. In this paper

a Viterbi decoder with high throughput and low power is presented for convolutional codes in IEEE 802.11n standard

capable for 1/2

2/3

3/4

5/6 rates. This decoder fulfills full-parallel ACS units

MSB over-floating protection

and a registers exchange scheme for low power design is used to cut off the dynamic power in register effectively. The decoder has been implemented by SMIC 0.13-m CMOS process

and the max throughput is 480Mb/s with the power of 25mW at 240MHz frequency.