A design of PFM boost DC-DC converter in CSMC 0.5μm CMOS technology is described. The critical parts such as the reference generation

comparator

PFM controlled circuit and over-current protected circuit are analyzed. The simulation results show that it has advantages of low voltage start

high accuracy of ouput voltage

low power dissipation and over-current protection. According to a standard 0.5μm DPTM double wells CMOS process topological design rule of CSMC

the layout of the proposed circuit is realized.