The front-end read-out circuit for Positron Emission Tomography (PET) imaging system is a kind of digital-analog mixed-signal VLSI.Based on the features of multi-channel and high performances of these kinds of chip

the JTAG controller is adopted to realize the initial control and auxiliary test of the chip.An extendable JTAG controller IP core is designed using TSMC 0.18 μm CMOS process

which supports 14 groups of extendable control signal and also supports the reading and writing operations of 16 multi-bits registers scan chains

and joins with the customized substrate driving software.The designed JTAG controller IP core can be also used for the controlling and testing of other mixed-signal VLSI

and has good universality and engineering usage.