Due to the complexity of coarse-grained reconfigurable architectures

design of CGRA require system-level modeling and simulation-based performance exploration.This paper proposes a system-level model for reconfigurable processor array

which is constructed with SystemC transaction level language.The model is based on a hierarchical intercornect network

in which any two processors can initiate communication and resources in processors can be quickly configured by parameters.The result of the simulation shows that the model can be used in the simulation of application algorithms mapping onto CGRA.