YE Zhen-hua, YANG Hai-gang, LI Fan-yang, et al. A Universal High-Speed、 Low-Power Dynamic Slew-Rate Enhancement Circuit for Large Capacitancer[J]. 2012, 29(12): 75-79.
YE Zhen-hua, YANG Hai-gang, LI Fan-yang, et al. A Universal High-Speed、 Low-Power Dynamic Slew-Rate Enhancement Circuit for Large Capacitancer[J]. 2012, 29(12): 75-79.DOI:
This paper presents a new class of universal high-speed
low-power dynamic slew-rate enhancement (SRE) circuit for heavy capacitive load.The circuit is directly driven by the transient of input signals
which monitor the slewing condition of the main op-amp.Accordingly
the slewing performance is dynamically boosted.The proposed circuit parallels the main op-amp
thus can be used in all types of op-amps.Power consumption is greatly saved by driving the SRE circuit into sleeping state when slewing boosting is completed.The circuit is designed and fabricated in 0.35 μm commercial process
occupying 0.15×0.15 mm2 chip area.The circuit operates with a single 5 V supply.The experimental results show that 7 V/μs positive slew-rate and 10 V/μs negative slew-rate are achievable for 400 pF load capacitance
with 6.25 μW power dissipation.Comparing with traditional SRE circuits
the slewing boosting efficiency is greatly improved.