Random test program generation is an important supporting technology for the function verification of processors.We design an efficient random test program generator for FlexEngine

an ASIP.We create the instruction set model by classifying instructions according to the function

which enable it test the key modules of FlexEngine selectively.Additionally

the traditional static constraints are strengthened by ISS

which analyze data dynamically.So

we add some accurate constraints

such as monitoring the range of register data

warning the endless loop.Experimental results show that the ATPG can test FlexEngine efficiently

which achieves high coverage beyond 90%

when the length of test program is only 3000.