High order continuous-time ΣΔ modulator provides an effective way to realize analog-digital converters of high resolution and low power consumption.A novel 2-1-1 cascaded continuous-time ΣΔ modulator has been proposed by transforming the discrete-time ΣΔ modulator to the continuous-time one using the impulse-invariant transformation.The continuous-time ΣΔ modulator is modeled and simulated using Simulink

obtaining a peak signal-to-noise ratio of 105 dB.The effects of circuit non-ideal factors on the modulator performance are then analyzed.The detailed indices of circuit sub-modules are determined by setting a signal-to-noise ratio of 90 dB as the design aim.Simulation results indicate that this modulator architecture can lower the system power consumption effectively

and the feasibility of circuits is successfully verified.