A pre fully differential operational amplifier with lower high-frequency noise was proposed in this paper.Two sets of inter bias circuit was used

one for unity gain buffer circuit

another for amplification.In order to ensure the stability of the circuit and reduce design difficulty

the unity gain buffer circuit and the common-mode feedback loop was combined.The circuit was implemented in HHNEC 0.18 μm BCD technology.The Cadence Spectre simulation results showed that the common-mode feedback loop had a loop gain of 84.93 dB

unity-gain bandwidth of 9.52 MHz and phase margin of 67.62° when working

the unity gain buffer circuit had a loop gain of 85.18 dB

unity-gain bandwidth of 8.93 MHz and phase margin of 67.2° when starting

and had a loop gain of 63.26 dB

unity-gain bandwidth of 2.28 MHz and phase margin of 88.66° when turning off.Test results show that the design reduced the output noise of the Class D Audio Power Amplifier when starting or turning off.