In this paper

a new 2.45GHz high-speed low-power frequency synthesizer structure based on FLL is proposed.It is composed of a frequency detector

digital control circuit and a current-controlled oscillator.The high speed frequency detector is used to detect the oscillator output frequency

and the digital control logic is used to adjust the frequency of the oscillator output signal according to the frequency detected results so as to achieve the synchronization between the output frequency and the target frequency.The high speed frequency detector is based on a asynchronous counting structure which can reduce the operating frequency of the internal module and thus make the system stable;digital control circuit uses successive approximation algorithm

making the locking speed fast;current-controlled oscillator based on differential current-starved delay cell uses current-capacitor dual control mode so as to achieve wide output frequency tuning range and high accuracy.The circuit structure is simple and the layout area is 13 200m2.The simulation results in CMOS 0.18m process show that the locking time of the proposed frequency synthesizer is 14s

tuning range of the output frequency is from 1GHz to 4.5GHz

and the locked frequency is 2.45GHz with the power consumption of 4.622mW.