To prevent the accumulation of SEU errors in the SRAM of space application

this paper puts forward an optimized scrubbing mechanism featuring with reading

checking and writing back.The mechanism makes a realtime monitor for the processor state.When the processor requests the external main memory to read

the memory controller will scrub the storage unit which was reading without CPU intervention.While the processor has no operation on main memory

the memory controller is of independence to refresh all SRAM cells

which is traverse type.The mechanism can avoid SEU errors accumulation in SRAM cells which has not been read for a long time

and guarantee that the error bits in an SRAM cell is less than the check code error detection ability.Finally

this paper makes the memory controller which is implemented the scrubbing mechanism a verification

the results show that the memory controller can archive the design requirements.