HE Jia-wei, HE Xin, WEI Zhong-hui, et al. Design of High-speed Image and Real-time Information Composite Processor Based on FPGA[J]. 2015, 32(4): 94-97.
HE Jia-wei, HE Xin, WEI Zhong-hui, et al. Design of High-speed Image and Real-time Information Composite Processor Based on FPGA[J]. 2015, 32(4): 94-97.DOI:
A real-time information synthetic method based on hardware system is given out
and a real-time information synthetic processor based on FPGA is designed in this paper. The processor can compose synchronization information when camera outputs image. The processor can receive 16 RS-422 serial data and 8 RS-232 serial data at most
and automatically adapt the input images resolution and frame rate. The experiment data verifies the correctness of the processor. The processor is good at real-time