一种基于随机指令延迟的抗旁路攻击处理器结构

李红; 贺章擎; 徐元中

Chinese

您当前的位置：

首页 >

文章列表页 >

一种基于随机指令延迟的抗旁路攻击处理器结构

更新时间：2026-09-04

- 一种基于随机指令延迟的抗旁路攻击处理器结构
- An Efficient Processor Architecture to Resist Side Channel Attacks
- 微电子学与计算机 2016年33卷第5期页码：6-9
- 作者机构：
  
  1. 湖北工业大学机构计算机科学与技术学院,湖北,武汉,430068
  2. 华中科技大学计算机科学与技术学院,湖北,武汉,430074
  3. 湖北工业大学太阳能高效利用湖北省协同创新中心,湖北,武汉,430068
- 作者简介：
- 基金信息：
  
  国家自然科学基金 61170135太阳能高效利用湖北省协同创新中心开放基金项目 HBSKFZD2014010
- DOI：
  中图分类号：
- 纸质出版：2016
- 稿件说明：
移动端阅览
李红, 贺章擎, 徐元中. 一种基于随机指令延迟的抗旁路攻击处理器结构[J]. 微电子学与计算机, 2016, 33(5): 6-9, 14.

LI Hong, HE Zhang-qing, XU Yuan-zhong. An Efficient Processor Architecture to Resist Side Channel Attacks[J]. 2016, 33(5): 6-9.
李红, 贺章擎, 徐元中. 一种基于随机指令延迟的抗旁路攻击处理器结构[J]. 微电子学与计算机, 2016, 33(5): 6-9, 14. DOI：

LI Hong, HE Zhang-qing, XU Yuan-zhong. An Efficient Processor Architecture to Resist Side Channel Attacks[J]. 2016, 33(5): 6-9. DOI：

摘要

提出了一种基于随机延迟的高效的抗旁路攻击处理器结构

综合采用随机指令调度、随机指令注入和随机流水段延迟技术以抵抗旁路攻击.基于ARM7处理器实现了该架构

实现结果表明本处理器比原始ARM7处理器增加了约20%的硬件面积.通过相关系数分析攻击(Correlation Power Analysis

CPA)实验证明

采用本架构的处理器具备有极高的抗旁路攻击防护能力

可以应用在USBKEY、智能卡(Smart CARD)等高安全应用场合.

Abstract

In this article

based on random delay insertion

an effective processor architecture resistant to side-channel attacks was proposed. It used a combination of randomized scheduling

randomized instruction insertion and randomized pipeline-delay to resist side-channel attacks. On the base of ARM7 processor

we implemented this architecture and the implementation results showed that this processor has increased approximate 20% in hardware area than the original ARM7 processor. The CPA attack experiment results suggested that our new secure processor have high capacity to resist side-channel attacks and thus could be used in USBKEY

Smart CARD and other application scenarios which require extremely high security level.

关键词

Keywords

references

Rivain M, Prouff E. Provably secure higher-order masking of AES[C]// CHES 2010, LNCS. American, Santa Barbara, 2010, 413-427.

Tiri K, Hwang D, Hodjat A, et al. A side-channel leakage free coprocessor IC in 0.18μm cmos for embedded AES-based cryptographic and biometric processing[C]// Proc. IEEE/ACM Design Automa. Conf. New York, 2005: 222-227.

Clavier C, Coron J S, Dabbous N. Differential power analysis in the presence of hardware countermeasures[C]// Cryptographic Hardware and Embedded Systems-CHES2000. Berlin, Heidelberg, Springer, 2000.

Ratanpal G B, Williams R D, Blalock T N. An on-chip signal suppression countermeasure to power analysis attacks[J]. IEEE Trans. Depend. Secure Comput, 2004, 1(3): 179-189. DOI: 179

Messerges T S, Dabbish E A. Examining smart-card security under the threat of power analysis attacks[J]. IEEE Trans. Comput, 2002, 51(5): 541-552. DOI: 541

May D, Muller H L, Smart N P. Non-deterministic Processors[C]// Proc. 6th Australasian Conference on Information Security and Privacy. Australia, Sydney, 2010(219): 115-129.

Coron J S, Kizhvatov I. An efficient method for random delay generation in embedded software[C]// CHES 2009, LNCS. Switzerland, Lausanne, 2009: 156-170.

Berlin Mangard S, Oswald E, Popp T, et al. Power analysis attacks: revealing the secrets of smart cards[M]. Berlin, Springer, 2007.

Charvillon N V, Medwed M, Kerckhof S, et al. Shuffling against side-channel attacks a comprehensive study with cautionary note[C]// ASIACRYPT 2012, LNCS. Beijing, 2012: 740-757.

贺章擎, 敖天勇, 刘恺, 等. 基于随机指令注入的抗旁路攻击硬件防护技术[J]. 华中科技大学学报(自然科学版), 2014, 42(5): 128-132. DOI: 128

浏览量

下载量

CSCD

文章被引用时，请邮件提醒。

提交

工具集

关联资源

V型沟槽SiC中子探测器的蒙特卡洛分析

面向处理器分支预测单元的Spectre攻击轻量化防御方法

一种基于特征上下文理解与切片分析的肺结核检测算法

基于监控指标关联性的微服务异常检测

基于多尺度融合与小目标增强的航拍车辆检测算法