1. 南开大学 电子与光学工程学院,天津,300071
2. 中国科学院 机构 微电子研究所,北京,100029
纸质出版:2016
移动端阅览
商新超, 袁甲, 张福海. 面向近亚阈值的标准单元库设计方法[J]. 微电子学与计算机, 2016, 33(3): 11-14.
SHANG Xin-chao, YUAN Jia, ZHANG Fu-hai. The Design Method of Sub-threshold Standard Cell Library[J]. 2016, 33(3): 11-14.
由于商用标准单元无法支持在极低电压下工作
为使数字电路能够工作其最优能耗点
采用smic130 nm CMOS工艺
对近/亚阈值电压下标准单元库的设计方法展开研究
定制了近/亚阈值的标准单元库.测试结果显示
所有库单元能够正常工作的电源电压低于90 mV.为了进一步验证定制标准单元库的稳定性
我们提出了一个4×8的FIR滤波器
测试芯片选择了130 nm的CMOS工艺进行流片
测试结果显示时钟频率为100 Hz时
最低能耗点的工作电压为0.25 V
能耗是150 nJ/cycle
芯片的最低工作电压为0.18 V.
Because of commercial standard cell library cantoperate at ultra low supply voltages
in order to make the digital circuits operate at the minimum energy point
we selected 130 nm CMOS technology and investigated the design method of Sub-threshold standard cell library. Measurements show that all of the cells in the library operate at voltage below 90 mv. In order to father validate the stability of sub-threshold standard cell library
We presented an 4×8 process FIR filter
a test chip has been implemented in a selected 130 nm CMOS technology
and measurements show that the minimum energy operating point is at 0.25 V
consuming 150 nJ with the clock frequency of 100 Hz
the minimum voltage supply for the chip is 0.18 V.
Calhoun B, Chandrakasan A. Characterizing and modeling minimum energy operation for subthreshold circuits[C]// International Symposium on Low-Power Electronics and Design (ISLPED) Digest of Technical Papers. California, USA, 2004: 90-95.
Bol D, Vos J, Hocquet C. Sleep Walker: a 25 MHz 0.4 V Sub-mm2 7 uW/MHz microcontroller in 65 nm LP-GP CMOS for low-carbon wireless sensor modes[J]. IEEE J. Solid-State Circuits, 2013, 48(1): 115-126. DOI: 115
New York Wang A, Calhoun B H, Chandrakasan A. Sub-threshold design for ultra low-power systems[M]. New York: Springer, 2006.
Qian Xie, Jun Xu, Yuan Taur. Review and critique of analytic models of MOSFET short-channel effects in subthreshold[J]. IEEE Transactions on electron devices, 2012, 59(6): 1569-1579. DOI: 1569
Wang A, Chandrakasan A. A 180 mV subthreshold FFT processor using a minimum energy design methodology[J]. IEEE J. Solid-State Circuits, 2005, 40(1): 310-319. DOI: 310
Wang A, Chandrakasan A. A 180 mV FFT processor using sub-threshold circuit techniques[C]// IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. USA, San Francisco, 2004: 292-293.
Calhoun B H, Wang A, Chandrakasan A. Modeling and sizing for minimum energy operation in subthreshold circuits[J]. IEEE J. Solid-State Circuits, 2005, 40(9): 1778-1786. DOI: 1778
Kwong J, Chandrakasan A. Variation-driven device sizing for minimum energy sub-threshold circuits[C]// Proc. Int. Symp. Low-Power. Electronics Design. USA, New York, 2006: 8-13.
Kwong J, Ramadass Y, Verma N. A 65nm sub-Vt microcontroller with integrated SRAM and switched capacitor DC-DC converter[J]. IEEE J. Solid-State Circuits, 2009, 44(1): 115-126. DOI: 115
0
浏览量
14
下载量
0
CSCD
关联资源
相关文章
相关作者
相关机构
京公网安备11010602201714号