上海交通大学 电子信息与电气工程学院 微纳电子学系,上海,200240
纸质出版:2016
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章裕, 谢憬, 王超, 王琴, 毛志刚. 一种面向多核系统的DDR2 SDRAM控制单元[J]. 微电子学与计算机, 2016, 33(7): 19-23.
ZHANG Yu, XIE Jing, WANG Chao, et al. An Optimized DDR2 SDRAM Control System for Multi-Core System[J]. 2016, 33(7): 19-23.
针对目前大幅增加的访问密集型应用
提出了一种多核系统的DDR2 SDRAM控制单元
重点介绍了该控制单元在各方面的各种优化技术
如结构、控制策略、调度策略等
同时也提出了一种新的地址映射机制
通过相应的映射机制决定请求会被传送到指定的行、列地址
再配合相应的控制策略使得系统有效提升了整体带宽.在实验证明性能得到提升的条件下
通过使用相应的综合工具对电路进行了综合
进行了硬件开销的评估.最后通过测试结果证明了该控制单元应用于整个系统有较好的性能提升.
To solve intensive application
a DDR2 SDRAM control system for multi-core system and memory intensive application is proposed. The paper focus on various optimization techniques in structure
control and schedule strategy. It also puts forward a new address mapping method that will improve the overall bandwidth. The mapping method transfers different requests to different banks
rows and columns. With the control policy
the performance of system gets promoted. Synthesize tool is used to evaluate the hardware expense. Experiments show that in the control system
SDRAM controller brings up better performance.
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