一种改进算法的低功耗嵌入式系统代码压缩设计

张瑞峰; 马文杰

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一种改进算法的低功耗嵌入式系统代码压缩设计

更新时间：2026-09-04

- 一种改进算法的低功耗嵌入式系统代码压缩设计
- An Improved Code Compression Algorithm for Low Power Embedded System Designs
- 微电子学与计算机 2016年33卷第5期页码：85-88
- 作者机构：
  
  天津大学电子信息工程学院,天津,300072
- 作者简介：
- 基金信息：
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- 纸质出版：2016
- 稿件说明：
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张瑞峰, 马文杰. 一种改进算法的低功耗嵌入式系统代码压缩设计[J]. 微电子学与计算机, 2016, 33(5): 85-88.

ZHANG Rui-feng, MA Wen-jie. An Improved Code Compression Algorithm for Low Power Embedded System Designs[J]. 2016, 33(5): 85-88.
张瑞峰, 马文杰. 一种改进算法的低功耗嵌入式系统代码压缩设计[J]. 微电子学与计算机, 2016, 33(5): 85-88. DOI：

ZHANG Rui-feng, MA Wen-jie. An Improved Code Compression Algorithm for Low Power Embedded System Designs[J]. 2016, 33(5): 85-88. DOI：

摘要

采用一种代码压缩的方法来降低嵌入式系统的功耗.在分析指令的特性后对目标代码进行指令合并和指令分割

运用范式Huffman算法对处理后的指令进行编码生成索引查找表.最后

通过查找表中索引字和指令的对应关系完成目标代码的压缩和解压缩.实验使用simplescalar模拟器对部分嵌入式基准测试程序进行压缩

用代码压缩率和功耗减少率进行评估

统计数据表明提出的改进算法可有效节省存储空间、降低系统功耗.

Abstract

A new code compression scheme was proposed to solve the power consumption problem in embedded systems.After analyzing the characteristics of instructions in target program

instructions will be combined and split

then the canonical Huffman algorithm is used to encode the modified instructions to generate look-up tables.Finally

code will be compressed and decompressed on the base of the corresponding relations between instructions and code words in look-up tables. According to the compression rate and power reduction rate of partial programs of embedded benchmarks compressed by simplescalar simulator

statistical data showed that the proposed algorithm can effectively save the storage space and reduce the power consumption of system.

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references

Benini L, Macii A, Nannarelli A. Cached-code compression for energy minimization in embedded processors[C]//International Symposium on Low Power Electronics and Design. California, USA: ACM, 2001: 322-327.

Nekritch Y. Decoding of canonical Huffman codes with look-up tables[C]//Proceedings of the Data Compression Conference, Snowbind, USA: IEEE, 2000: 28-30.

Wolfe A, Chanin A. Executing compressed programs on an embedded RISC architecture[J]. ACM Sigmicro Newsletter, 1992, 23(1-2): 81-91. DOI: 81

Bonny T, Henkel J. Instruction splitting for efficient code compression[C]//Design Automation Conference. SanDiego, USA: IEEE, 2007: 646-651.

Lekatsas H, Wolf W. SAMC: a code compression algorithm for embedded processors. [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000, 18(12): 1689-1701. DOI: 1689

Bonny T, Henkel J. Huffman-based code compression techniques for embedded processors[J]. ACM Transactions on Design Automation of Electronic Systems, 2010, 15(4): 523-530. DOI: 523

Lin C, Lin C H, Wang W J. A power-aware code-compression design for RISC/VLIW architecture [J]. Journal of Zhejiang University Science C, 2011, 12(8): 629-637. DOI: 629

Azevedo D W R, Moreno E D, Nattan Palmeira I. A new code compression algorithm and its decompressor in FPGA-based hardware[C]//Integrated Circuits and Systems Design, 2013 26th Symposium on. Citiba, Brazil: IEEE, 2013: 1-6.

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