In elliptic curve system

the operational efficiency of the finite field is essential. In this paper

for the low-end FPGA chip

we optimize finite field modular multiplication and modular inversion from both algorithms and hardware realization. The improved modular multiplication algorithm reduces a 256 bit multiplication and reduces a 128 bit multiplication in hardware implementation. Modular inversion algorithm improved without increasing the hardware resources available to reduce the number of iterations; with subtraction and subsequent correction algorithms instead of 256 bit comparator

improved design can interrupt a combination of long chain

improve resource complex with rates

and achieve a balance of size and speed.