1. 桂林电子科技大学 机构 电子工程与自动化学院,广西,桂林,541004
2. 桂林航天工业学院 机构,广西,桂林,541004
3. 桂林电子科技大学 广西自动检测技术与仪器重点实验室,广西,桂林,541004
纸质出版:2016
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张晓芳, 李智, 牛军浩. 基于演化硬件的多目标进化算法的研究[J]. 微电子学与计算机, 2016, 33(9): 119-123.
ZHANG Xiao-fang, LI Zhi, NIU Jun-hao. Research of Multi-objective Optimization Evolutionary Algorithm Based on Evolvable Hardware[J]. 2016, 33(9): 119-123.
传统遗传算法在演化数字逻辑电路时表现为演化速度缓慢且极易陷入局部最优解
而且易出现早熟收敛现象.针对上述问题
给出一种基于遗传算法的多目标进化算法
即强度Pareto进化算法2(SPEA2)用于数字逻辑电路的进化设计.演化平台以虚拟可重构电路为电路基础
FPGA为实现载体
利用Microblaze软核实现该算法对目标电路的演化操作.通过两位乘法器电路证明了所给出算法的全局搜索能力
且能够有效地减少搜索到全局最优解的迭代次数
并在一定程度上优化演化电路的规模
提高设计效率.
During the evolution of digital logic circuit
genetic algorithm(GA)possess a slow evolution
plunges into local optimal solution and produces premature convergence phenomenon easily.To solve these problems
a kind of multi-objective optimization evolutionary algorithm(MOEA)
strong Pareto evolutionary algorithm 2(SPEA2)which utilized for the evolution is given.The scheme constructs a platform on FPGA based on Virtual reconfigurable circuit(VRC)and employs Microblaze soft core to implement the evolutionary algorithms for the evolution of the target circuit.The evolution of two multiplier proves global searching ability of the proposed algorithm and demonstrates that the algorithm can effectively reduce the number of iterations to search the global optimal solution.Experiments shows that the proposed algorithm can improve the efficiency of evolution of the circuit scale and design to a certain extent.
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