基于相邻多层冗余共享的三维存储器堆叠方法

刘军; 李进; 王伟; 任福继

Chinese

您当前的位置：

首页 >

文章列表页 >

基于相邻多层冗余共享的三维存储器堆叠方法

更新时间：2026-09-04

- 基于相邻多层冗余共享的三维存储器堆叠方法
- A Stacking Scheme Using Adjacent Redundancy Across Dies for 3D-stacked Memory
- 微电子学与计算机 2017年34卷第7期页码：1-6
- 作者机构：
  
  1. 合肥工业大学计算机与信息学院,安徽,合肥,230009
  2. 情感计算与先进智能机器安徽省重点实验室机构,安徽,合肥,230009
  3. 日本德岛大学先端技术科学教育部, 日本德岛 7708502
- 作者简介：
- 基金信息：
  
  国家自然科学基金资助项目 61306049国家自然科学基金资助项目 61204046国家自然科学基金资助项目 61432004国家自然科学基金资助项目 61474035
- DOI：
  中图分类号：
- 纸质出版：2017
- 稿件说明：
移动端阅览
刘军, 李进, 王伟, 任福继. 基于相邻多层冗余共享的三维存储器堆叠方法[J]. 微电子学与计算机, 2017, 34(7): 1-6.

LIU Jun, LI Jin, WANG Wei, et al. A Stacking Scheme Using Adjacent Redundancy Across Dies for 3D-stacked Memory[J]. 2017, 34(7): 1-6.
刘军, 李进, 王伟, 任福继. 基于相邻多层冗余共享的三维存储器堆叠方法[J]. 微电子学与计算机, 2017, 34(7): 1-6. DOI：

LIU Jun, LI Jin, WANG Wei, et al. A Stacking Scheme Using Adjacent Redundancy Across Dies for 3D-stacked Memory[J]. 2017, 34(7): 1-6. DOI：

摘要

为提高三维存储器的成品率和减少冗余行列所需的TSVs的数量

提出每一层存储块都与相邻上下两层共享冗余的三维存储器冗余共享结构

并给出了一种新的堆叠方案

将故障较多与较少的芯片交替堆叠.实验结果表明

该结构在有效控制TSVs数量增长的前提下

提高了三维存储器的修复率.

Abstract

To improve the yield and the number of TSVs used in spare rows and columns

this paper proposed a sharing structure of adjacent redundancy across dies. Besides

based on the new redundancy sharing structure

a die-selection method stacking alternative memory layers with different number of faults was also presented. Experimental results show that the proposed method can significantly increase memory yield with relatively small area overhead of TSVs.

关键词

Keywords

references

Kiyoo Itoh B S. Embedded memories: progress and a look into the future[J]. Design % Test of Computers, IEEE, 2011, 28(1): 10-13. DOI: 10

Che Wei C, Yu Jen H, Jin Fu L. Yield-enhancement techniques for 3D random access memories[C]//Proceedings of the VLSI Design Automation and Test (VLSI-DAT), 2010 International Symposium on. Hsinchu, Taiwan 2010: 104-7.

Stapper C H, McLaren A N, Dreckmann M. Yield model for productivity optimization of vlsi memory chips with redundancy and partially good product[J]. IBM Journal of Research and Development, 1980, 24(3): 398-409. DOI: 398

Lee J, Park K, Kang S. A die-selection method using search-space conditions for yield enhancement in 3d memory[J]. Etri Journal, 2011, 33(6): 904-913. DOI: 904

Banerjee K, Souri S J, Kapur P, et al. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration[J]. Proceedings of the IEEE, 2001, 89(5): 602-633. DOI: 602

Rab M T, Bawa A A, Touba N A. Reducing cost of yield enhancement in 3-d stacked memories via asymmetric layer repair capability[J]. Ieee T Vlsi Syst, 2014, 22(9): 2017-2024. DOI: 2017

Allan A, Edenfeld D, Joyner W H, et al. 2001 technology roadmap for semiconductors[J]. Computer, 2002, 35(1): 42-53. DOI: 42

Schuster S E. Multiple word/bit line redundancy for semiconductor memories[J]. Solid-State Circuits, IEEE Journal of, 1978, 13(5): 698-703. DOI: 698

Zorian Y, Shoukourian S. Embedded-memory test and repair: infrastructure IP for SoC yield[J]. Design % Test of Computers, IEEE, 2003, 20(3): 58-66. DOI: 58

Stapper C H. On a composite model to the IC yield problem[J]. Solid-State Circuits, IEEE Journal of, 1975, 10(6): 537-539. DOI: 537

Li J, Rong Y, Qiang X. Yield enhancement for 3D-stacked memory by redundancy sharing across dies[C]//Proceedings of the Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on. San Jose, 2010: 230-234.

Kuo S Y, Fuchs W K. Efficient spare allocation for reconfigurable arrays[J]. Design % Test of Computers, IEEE, 1987, 4(1): 24-31. DOI: 24

Chin-Long W, Lombardi F. On the repair of redundant RAM's[J]. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 1987, 6(2): 222-231. DOI: 222

Lee J, Park K, Kang S. Yield enhancement techniques for 3d memories by redundancy sharing among all layers[J]. Etri Journal, 2012, 34(3): 388-98. DOI: 388

浏览量

下载量

CSCD

文章被引用时，请邮件提醒。

提交

工具集

关联资源

面向处理器分支预测单元的Spectre攻击轻量化防御方法

基于监控指标关联性的微服务异常检测

低功耗设计的双链电源关断策略的实现与验证

超低功耗实时时钟电路的设计

基于反向体偏置的高增益稳定性高温运放设计