1. 中国科学院 机构 微电子研究所,北京,100029
2. 江苏物联网研究发展中心,江苏,无锡,214135
纸质出版:2017
移动端阅览
张广银, 沈千行, 喻巧群, 卢烁今, 朱阳军. 非对称超结场效应晶体管设计和仿真[J]. 微电子学与计算机, 2017, 34(7): 18-22.
ZHANG Guang-yin, SHEN Qian-xing, YU qiao-qun, et al. Design and Simulation of Asymmetric SJ-MOSFET[J]. 2017, 34(7): 18-22.
为了克服传统功率MOSFET通态电阻和击穿电压之间的矛盾
引入了超级结(SJ)器件
通过引入横向电场来提高击穿电压.针对工艺中非对称pillar的设计需求
建立了非对称的研究分析模型
通过引入影响设计的非对称因子
分析了的物理意义和修正了不同pillar比例下的值来设计相关参数
推导出超结的设计解析表达式.为了验证设计的准确性
以沟槽栅SJ-MOSFET为器件
进行了仿真验证和比较
理论与仿真结果符合良好
可以用于超结MOSFET的设计指导.
In order to overcome the traditional power MOSFET contradiction between on-state resistance and breakdown voltage
the super junction (SJ) device is introduced
so that it improves the breakdown voltage through the transverse electric field. In asymmetric pillar design requirements
establishing the asymmetry analysis model
introducing asymmetric factor k
analyzing the physical meaning of k and modifying the k value for pillar in different proportions
analytical expression of super junction is derived. In order to verify the accuracy of the design
basing on trench gate SJ-MOS device
simulation verification and comparison are carried out.
theoretical and simulation results are in good agreement
the theory can be used as a guide for the design of super junction MOSFET.
Tatsuhiko. Theory of semiconductor superjunction devices[J]. Japanese Journal of Applied Physics, 1997, 36(10): 6254-6262. DOI: 6254
Zhang B, Zhang W, Li Z, et al. Equivalent substrate model for lateral super junction device[J]. IEEE Transactions on Electron Devices, 2014, 61(2): 525-532. DOI: 525
Pravin N K. Analytical design and simulation studies of super-junction power mosfet[C]//2007 IEEE International Symposium on Industrial Electronics. Vigo, 2007: 503-508.
Takahashi K, Kuribayashi H, Kawashima T, et al. 660 V super junction mosfets fabricated by deep trench etching and epitaxial growth[C]// 2006 IEEE International Symposium on Power Semiconductor Devices and IC's. Naples, 2006: 1-4.
Xing Bi C, Xin W, Sin J K O. A novel high-voltage sustaining structure with buried oppositely doped regions[J]. IEEE Transactions on Electron Devices, 2000, 47(6): 1280-1285. DOI: 1280
Baliga B J. Fundamentals of power semiconductor devices[M]. North Carolina State University, Raleigh, NC, Springer Science 2008.
Wang H, Napoli E, Udrea F. Breakdown voltage for superjunction power devices with charge imbalance: an analytical model valid for both punch through and non punch through devices[J]. IEEE Transactions on Electron Devices, 2009, 56(12): 3175-3183. DOI: 3175
Fujihira T, Miyasaka Y. Simulated superior performances of semiconductor superjunction devices[C]//Power Semiconductor Devices and ICs, 1998 ISPSD 98 Proceedings of the 10th International Symposium on. Kyoto, Japan, 1998: 423-426.
Fulop W. Calculation of avalanche breakdown of Silicon P-N junctions[J]. Solid State Electronics, 1967, 10(1): 39-43. DOI: 39
Strollo A G M, Napoli E. Optimal resistance versus breakdown voltage tradeoff in superjunction power devices: a novel analytical model[J]. IEEE Transactions on Electron Devices, 2001, 48(9): 2161-2167. DOI: 2161
Zhang W, Zhang B, Li Z, et al. Theory of superjunction with nfd and fd modes based on normalized breakdown voltage[J]. IEEE Transactions on Electron Devices, 2015, 62(12): 4114-4120. DOI: 4114
Huang H, Chen X. Optimization of specific on-resistance of balanced symmetric superjunction mosfets based on a better approximation of ionization integral[J]. IEEE Transactions on Electron Devices, 2012, 59(10): 2742-2747. DOI: 2742
方健, 乔明, 李肇基. 电荷非平衡superjunction结构电场分布[J]. 物理学报, 2006, 53(55): 3656-3668. DOI: 3656
0
浏览量
26
下载量
0
CSCD
关联资源
相关文章
相关作者
相关机构
京公网安备11010602201714号