1. 中国科学院 机构 声学研究所,北京,100190
2. 中国科学院大学 机构 电子电气与通信工程学院,北京,101400
纸质出版:2019
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贾正义, 陈晓, 王劲林, 叶晓舟. 基于多核网络处理器的时间感知整形技术研究与实现[J]. 微电子学与计算机, 2019, 36(12): 1-5, 10.
JIA Zheng-yi, CHEN Xiao, WANG Jin-lin, et al. Research and implementation of Time-Aware Shaping mechanism based on multi-core network processor[J]. 2019, 36(12): 1-5.
时间感知整形(Time Aware Shaper
TAS)是时间敏感网络(Time-Sensitive Network
TSN)的关键机制
对于TAS的研究与实现具有重要意义.基于多核网络处理器设计了TAS机制功能模块结构和TAS引擎处理流程
针对由于内核时钟与PTP(Precision Time Protocol)时钟存在误差而导致的时隙长度偏差问题
提出了调整保护时隙算法来校正时隙.最后
基于Cavium多核网络处理器实现了TAS机制
实验结果表明:TAS机制可以按照预配置时隙发包; 增加保护时隙调整
可以有效的校正时隙误差
增加TAS机制的鲁棒性.
The Time-Sensitive Networks (TSN) provides important network technology support for "Made in China 2025" plan. The design and implementation of the Time Aware Shaper (TAS)
the fundamental mechanism of TSN
is of great significance. In this paper
based on the multi-core network processor
we propose a method for quantifying the bandwidth into time slots and design the function module structure and the processing flow of the TAS mechanism. Moreover
for the problem of time slot length variation caused by the error between the CPU clock and the PTP (Precision Time Protocol) clock
we propose a protection band adjustment algorithm to correct the time slot of the port. Finally
we develop the TAS mechanism based on the Cavium multi-core network processor. The experimental results show that the TAS mechanism can send packets according to the pre-allocated time slots. Besides
enabling the protection band adjustment can effectively correct the time slot error and increase the robustness of the TAS mechanism.
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杨吉喆, 王玲玲, 陆建德.基于Octeon多核网络处理器的IPv6联动IPS研究与设计[J].微电子学与计算机, 2011, 28 (12): 79-83. DOI: 79
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基于多核网络处理器的流控技术研究[D].北京: 北京邮电大学, 2014.
朱明. 5G中网络切片研究的现状与挑战[J].网络新媒体技术, 2018, 7 (1): 1-6. DOI: 1
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