一种移动卷积神经网络的FPGA实现

李炳辰; 黄鲁

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一种移动卷积神经网络的FPGA实现

更新时间：2026-09-04

- 一种移动卷积神经网络的FPGA实现
- Hardware implementation of a convolutional neural network for mobile terminal based on FPGA
- 微电子学与计算机 2019年36卷第9期页码：7-11
- 作者机构：
  
  中国科学技术大学微电子学院,安徽,合肥,230026
- 作者简介：
- 基金信息：
- DOI：
  中图分类号：
- 纸质出版：2019
- 稿件说明：
移动端阅览
李炳辰, 黄鲁. 一种移动卷积神经网络的FPGA实现[J]. 微电子学与计算机, 2019, 36(9): 7-11.

LI Bing-chen, HUANG Lu. Hardware implementation of a convolutional neural network for mobile terminal based on FPGA[J]. 2019, 36(9): 7-11.
李炳辰, 黄鲁. 一种移动卷积神经网络的FPGA实现[J]. 微电子学与计算机, 2019, 36(9): 7-11. DOI：

LI Bing-chen, HUANG Lu. Hardware implementation of a convolutional neural network for mobile terminal based on FPGA[J]. 2019, 36(9): 7-11. DOI：

摘要

卷积神经网络是深度学习的一种重要模型

广泛应用于图像处理等领域.常用的神经网络模型因结构复杂

参数众多

不适于放在移动端运行.本文基于模块化和硬件复用的思想

给出了一种基于FPGA的手写数字字符识别网络的硬件实现

基于MobileNet的原理改进结构

在实现了算法硬件加速的同时

有效地降低了网络的参数数量和整体运算量.基于MNIST数据集的实验结果表明

对比传统结构的神经网络

改进结构的参数量减少了23.26%

计算量减少了31.32%

在保持速度不变的前提下

用更少的资源和更低的功耗实现了整个网络.

Abstract

Convolutional neural networks are an important model of deep learning and are widely used in image processing and other fields. The commonly used neural network model is complex and has many parameters

which is not suitable for running on the mobile end. Based on the idea of modularization and hardware reuse

this paper presents a hardware implementation of handwritten digital character recognition network based on FPGA. Based on the principle of MobileNet

the structure is improved

and the algorithm hardware acceleration is realized

and the number of parameters of the network and the overall calculation amount are effectively reduced. The experimental results based on the MNIST dataset show that compared with the traditional neural network

the parameter size of the improved structure is reduced by 23.26%

and the calculation amount is reduced by 31.32%. The entire network is implemented with less resources and lower power consumption while maintaining the same speed.

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references

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