一种3D NAND闪存负温度系数的读电压基准发生器

白连龙; MasaoKuriyama; 何洪楷

Chinese

您当前的位置：

首页 >

文章列表页 >

一种3D NAND闪存负温度系数的读电压基准发生器

更新时间：2026-09-04

- 一种3D NAND闪存负温度系数的读电压基准发生器
- A read reference generator with negative temperature coefficient for 3D NAND flash memory
- 微电子学与计算机 2019年36卷第7期页码：12-16
- 作者机构：
  
  1. 中国科学院大学机构,北京,101408
  2. 中国科学院机构微电子研究所,北京,100029
  3. 长江存储科技有限责任公司,湖北,武汉,430200
- 作者简介：
- 基金信息：
- DOI：
  中图分类号：
- 纸质出版：2019
- 稿件说明：
移动端阅览
白连龙, MasaoKuriyama, 何洪楷. 一种3D NAND闪存负温度系数的读电压基准发生器[J]. 微电子学与计算机, 2019, 36(7): 12-16.

BAI Lian-long, Masao Kuriyama, HE Hong-kai. A read reference generator with negative temperature coefficient for 3D NAND flash memory[J]. 2019, 36(7): 12-16.
白连龙, MasaoKuriyama, 何洪楷. 一种3D NAND闪存负温度系数的读电压基准发生器[J]. 微电子学与计算机, 2019, 36(7): 12-16. DOI：

BAI Lian-long, Masao Kuriyama, HE Hong-kai. A read reference generator with negative temperature coefficient for 3D NAND flash memory[J]. 2019, 36(7): 12-16. DOI：

摘要

由于阈值电压(threshold voltage

)的偏移

3D NAND闪存可靠性很容易受到温度变化的影响

这将进一步恶化读取裕度.为了解决这一问题

本文提出了一种具有负温度系数的读电压基准发生器来补偿阈值电压随温度的变化.本文所提出的具有负温度系数的电压电路通过分别调整负温度系数(complementary to absolute temperature

CTAT)电流和零温度系数(zero to absolute temperature

ZTAT)电流

可输出具有相同负温度系数的不同大小的读电压

并通过调制器(regulator)来提高其输出电压的范围.结果表明

所提出的方法可以提供一个可配置的读电压范围为1.5~4.5 V.

Abstract

3D NAND flash reliability is vulnerable to temperature variation due to the threshold voltages () shift

which will further deteriorate the read margin. To solve this issue

a read reference generator with negative temperature coefficient was proposed to compensate the shift under the changes of temperature. The proposed generator outputs different level voltages with the same negative temperature coefficient by adjusting the CTAT (complementary to absolute temperature) current and ZTAT (zero to absolute temperature) current

respectively. And the regulator was used to enhance the range of output voltage. The results showed the proposed method could provide a configurable range of read voltage of 1.5~4.5 V.

关键词

Keywords

references

CAI Y, LUO Y, HARATSCH E F, et al. Data retention in MLC NAND flash memory: Characterization, optimization, and recovery [C]// IEEE, Inter- national Symposium on High PERFORMANCE Computer Architecture. New Orleans, USA, IEEE, 2015: 551-563.

TANZAWA T, TANAKA T, TAMADA S, et al. A temperature compensation word-line voltage generator for multi-level cell NAND Flash memories[C]// ESSCIRC 2010.[S.L.], IEEE, 2010: 106-109.

MIYAJI K, JOHGUCHI K, HIGUCHI K, et al. An integrated variable positive/negative temperature coefficient read reference generator for MLC PCM/NAND Hybrid 3D SSD[C]// Solid State Circuits Conference. Singapore, IEEE, 2013: 313-316.

王超.一个快速瞬态响应无片外电容LDO设计[D].广州: 华南理工大学, 2018.

CHOI S W, PARK K T, PASSERINI M, et al. A cell current compensation scheme for 3D NAND FLASH memory[C]// Solid-State Circuits Conference. Lausanne, Switzerland, IEEE, 2016: 1-4.

Berlin MICHELONI R, CRIPPA L, MARELLI A. Inside NAND Flash Memories[M]. Berlin: Springer Netherlands, 2010.

CAI Y, HARATSCH E F, MUTLU O, et al. Threshold voltage distribution in MLC NAND flash memory: characterization, analysis, and modeling[C]// Design, Automation % Test in Europe Conference % Exhibition. Grenoble, France, IEEE, 2013: 1285-1290.

KLECZEK R, GRYBOS P. Low voltage area efficient current-mode CMOS bandgap reference in deep submicron technology[C]// Mixed Design of Integrated Circuits % Systems. Lublin, Poland. IEEE, 2014: 247-251.

王好德, 王永顺, 史琳, 等.高性能CMOS运算放大器的设计[J].微电子学, 2011, 41(1): 19-22. DOI: 19

浏览量

下载量

CSCD

文章被引用时，请邮件提醒。

提交

工具集

关联资源

一种基于特征上下文理解与切片分析的肺结核检测算法

一种用于极低压boost系统的高效率电荷泵

注意力机制与改进密集卷积引导的信息隐藏模型

超低功耗实时时钟电路的设计

基于反向体偏置的高增益稳定性高温运放设计