1. 兰州交通大学 机构 电子与信息工程学院,甘肃,兰州,730070
2. 中国科学院 机构 微电子研究所,北京,100029
3. 中国科学院大学 机构,北京,101408
纸质出版:2019
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张杰, 吴蓉, 徐进, 梁竞贤, 来龙坤, 罗卫军. 采用CMOS工艺的C波段5 bit数字移相器设计[J]. 微电子学与计算机, 2019, 36(11): 55-59.
ZHANG Jie, WU Rong, XU Jin, et al. Design of C-band 5 bit digital phase shifter based on CMOS technology[J]. 2019, 36(11): 55-59.
基于SMIC 0.13 μm CMOS工艺
采用片上巴伦、正交全通滤波器和吉尔伯特单元的设计方案
设计了一款C波段5 bit数字移相器.巴伦将单端输入信号分成两路反相的差分信号
并通过吉尔伯特单元将正交全通滤波器产生的正交信号进行矢量运算.在满足移相精度11.25°的条件下
实现4.5~7.5 GHz的工作带宽.电磁场仿真结果显示:在4.5~7.5 GHz频段
数字移相器插入损耗的典型值是-10 dB; 输入回波损耗和输出回波损耗分别优于-10.6 dB和-9.9 dB; RMS移相精度小于3.5°;芯片面积1.66 mm×0.74 mm; 该5 bit MMIC数字移相器相对带宽为50%
适用于5G低频段的通信系统中.
Based on SMIC 0.13 m CMOS technology
a C-band 5 bit digital phase shifter was designed by using on-chip Barron
orthogonal all-pass filter and Gilbert cell. The balun divided the input signal at one end into two inverse differential signals
and then carried out vector operation on the quadrature signals generated by the quadrature all-pass filter through Gilbert cell. The bandwidth of 4.5~7.5 GHz was achieved when the phase-shifting accuracy was 11.25 degrees. The simulation results of electromagnetic field showed that the typical insertion loss of digital phase shifter was -10 dB at 4.5-7.5 GHz; the input and output return losses were better than 10.6 dB and -9.9 dB
respectively; the phase shifting accuracy of RMS was less than 3.5 degrees
the size of the layout was 1.66 mm x 0.74 mm; and the relative bandwidth of the 5 bit MMIC digital phase shifter was 50%
which was suitable for 5G low frequency communication system.
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