基于FPGA的多人脸实时检测系统设计与实现

李斌; 许华杰; 吴朝晖

Chinese

您当前的位置：

首页 >

文章列表页 >

基于FPGA的多人脸实时检测系统设计与实现

更新时间：2026-09-04

- 基于FPGA的多人脸实时检测系统设计与实现
- Design and implementation of FPGA-based real time multiple face detection system
- 微电子学与计算机 2021年38卷第4期页码：57-62
- 作者机构：
  
  1. 华南理工大学微电子学院,广东,广州,510641
  2. 人工智能与数字经济广东省实验室(广州),广东,广州,510641
- 作者简介：
- 基金信息：
  
  国家自然科学基金资助 61571196广东省重点领域研发计划项目 2019B010145001中央高校基本科研业务费专项资助 D2190010
- DOI：
  中图分类号：
- 纸质出版：2021
- 稿件说明：
移动端阅览
李斌, 许华杰, 吴朝晖. 基于FPGA的多人脸实时检测系统设计与实现[J]. 微电子学与计算机, 2021, 38(4): 57-62.

LI Bin, XU Hua-jie, WU Zhao-hui. Design and implementation of FPGA-based real time multiple face detection system[J]. 2021, 38(4): 57-62.
李斌, 许华杰, 吴朝晖. 基于FPGA的多人脸实时检测系统设计与实现[J]. 微电子学与计算机, 2021, 38(4): 57-62. DOI：

LI Bin, XU Hua-jie, WU Zhao-hui. Design and implementation of FPGA-based real time multiple face detection system[J]. 2021, 38(4): 57-62. DOI：

摘要

设计了一种基于移动端深度学习目标检测算法MobileNetV2- SSDlite的小规模、高精度的人脸检测算法.在算法基础上，围绕硬件架构、片上缓存、性能及功耗等方面进行移动端专用型神经网络加速器的研究与设计; 在ALINX AX7350 SOC平台上实现了实时多人脸检测加速器系统.结果表明，本系统在100 MHz时钟下，平均计算性能为56.01 GOPS，功耗为7.3 W.与现有的MobileNetV2-SSDlite加速器相比，运算速度提高了28.7%，资源平均节省了44.46%，功耗降低了26.3%.在224×224分辨率下，达到了83.4 FPS，满足实时性需求.

Abstract

A small and high-precision face detection algorithm based on MobileNetV2-SSDlite is designed. To improve the computing capability of mobile terminals

the study of the mobile algorithm specific neural network accelerator is carried out in terms of hardware architecture

on-chip memory

performance and power consumption. A real-time multi-face detection accelerator system is simulated and implemented on ALINX AX7350 SOC platform. The results show that under a 100MHz clock

the face detection system has an average computing performance of 56.01 GOPS and a power consumption of 7.3W. Compared with the existing MobileNetV2-SSDlite accelerator

the operation speed is improved by 28.7%

the resources are reduced by 44.46%

and the power consumption is reduced by 26.3%. The speed of the system in inferencing a 224×224 resolution picture reached 83.4 FPS

meet the demand of real-time performance.

关键词

Keywords

references

YANG S, LUO P, LOY C, et al. WIDER FACE: a face detection benchmark[C]//Proceedings of 2016 IEEE Conference on Computer Vision and Pattern Recognition. Las Vegas: IEEE, 2016: 5525-5533. DOI: 10.1109/CVPR.2016.596.

LIU B, ZOU D Y, FENG L, et al. An FPGA-based CNN accelerator integrating depthwise separable convolution[J]. Electronics, 2019, 8(3): 281. DOI: 10.3390/electronics8030 281.

XU H J, WU Z H, DING J, et al. FPGA based real-time multi-face detection system with convolution neural network[C]//Proceedings of the 2019 8th International Symposium on Next Generation Electronics. Zhengzhou: IEEE, 2019: 1-3. DOI: 10.1109/ISNE.2019.8896551.

SANDLER M, HOWARD A, ZHU M L, et al. MobileNetV2: inverted residuals and linear bottlenecks[C]//Proceedings of 2018 IEEE/CVF Conference on Computer Vision and Pattern Recognition. Salt Lake City: IEEE, 2018: 4510-4520. DOI: 10.1109/CVPR.2018.00474.

秦琴. 基于肤色和几何特征的人脸检测与识别方法[J]. 科技风, 2018, 31(1): 232- 232. DOI: 10.19392/j.cnki.1671-7341.201801208. QIN Q. Face detection and recognition based on skin color and geometric features[J]. Technology Wind, 2018, 31(1): 232. DOI: 10.19392/j.cnki.1671-7341.201801208.

FAN H X, LIU S L, FERIANC M, et al. A real-time object detection accelerator with compressed SSDLite on FPGA[C]//Proceedings of 2018 International Conference on Field-Programmable Technology. Naha: IEEE, 2018: 14-21. DOI: 10.1109/FPT.2018.00014.

ZHANG K P, ZHANG Z P, LI Z F, et al. Joint face detection and alignment using multitask cascaded convolutional networks[J]. IEEE Signal Processing Letters, 2016, 23(10): 1499-1503. DOI: 10.1109/LSP.2016.2603342.

浏览量

下载量

CSCD

文章被引用时，请邮件提醒。

提交

工具集

关联资源

一种用于极低压boost系统的高效率电荷泵

基于区块链的AI生成内容溯源框架设计研究

V型沟槽SiC中子探测器的蒙特卡洛分析

基于反向体偏置的高增益稳定性高温运放设计

大模型发展综述：从BERT到Deepseek的技术演进