Aiming to improve the single event latch-up (SEL) performance of CMOS stand cell in 65-nm process
3D models of four guard ring had been built up by using Technology Computer Aided Design (TCAD) tool. Several different structures had been compared with TCAD simulation to compromise the anti-SEL performance and design costs. The simulation results showed that the unclosed guard ring structures was the best choice for stand cell of 65-nm
and the key design parameters of the structure are optimized by simulating irradiation simulation. A test chip using proposed radiation harden library had been tested in heavy ion experiment and no SEL occurred up to a LET of 99.8 MeV/mg/cm.