一种针对QCA电路的门级布局布线算法设计

邝锐; 彭斐; 张永强; 解光军

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一种针对QCA电路的门级布局布线算法设计

数字电路与系统 | 更新时间：2026-09-04

- 一种针对QCA电路的门级布局布线算法设计
- A gate-level placement and routing algorithm design for QCA circuits
- 微电子学与计算机 2021年38卷第9期页码：79-83
- 作者机构：
  
  合肥工业大学电子科学与应用物理学院,安徽,合肥,230009
- 作者简介：
- 基金信息：
  
  中央高校基本科研业务费专项资金 JZ2020HGQA0162中央高校基本科研业务费专项资金 JZ2020HGTA0085
- DOI：
  中图分类号：
- 纸质出版：2021
- 稿件说明：
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邝锐, 彭斐, 张永强, 解光军. 一种针对QCA电路的门级布局布线算法设计[J]. 微电子学与计算机, 2021, 38(9): 79-83.

KUANG Rui, PENG Fei, ZHANG Yongqiang, et al. A gate-level placement and routing algorithm design for QCA circuits[J]. 2021, 38(9): 79-83.
邝锐, 彭斐, 张永强, 解光军. 一种针对QCA电路的门级布局布线算法设计[J]. 微电子学与计算机, 2021, 38(9): 79-83. DOI：

KUANG Rui, PENG Fei, ZHANG Yongqiang, et al. A gate-level placement and routing algorithm design for QCA circuits[J]. 2021, 38(9): 79-83. DOI：

摘要

量子点元胞自动机(QCA)被认为是克服传统CMOS局限性的一种极有前景的解决方案.近年来，QCA电路的自动化设计工具的开发越来越受到研究者的关注，布局和布线算法则是其中至关重要的一环.算法设计的关键问题是时钟方案和时钟同步性约束.本文提出了一种门级布局和布线算法，在时钟方案约束的布局区域内预先计算和缓存路径信息，并应用深度优先搜索策略搜索正确的电路布局布线结果.该算法采用C ++编程语言实现，仿真结果验证了算法的正确性.

Abstract

Quantum-Dot Cellular Automata (QCA) is considered asa promising solution to overcome the limitations ofconventional CMOS. Recently

the development of automated design tools for QCA circuits has attracted more and more attention from researchers

where the placement and routing algorithm is a critical step. The key issue of an algorithm design is the constraints of a clock scheme and clock synchronization. Agate-level placement and routing algorithm is proposed. The path information is pre-calculated and cached within the layout region constrained by the clock scheme

and the depth-first search strategy is applied to search for the correct circuit placement routing results. The algorithm is implemented in C++ programming language

and simulation results verify the correctness of the proposed algorithm.

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Keywords

references

NIEMIER M T, KOGGE P M. Problems in designing with QCAs: Layout= timing[J]. International Journal of Circuit Theory and Applications, 2001, 29(1): 49-62. DOI: 10.1002/1097-007X(200101/02)29:1＜ 49::AID-CTA132＞3.0.CO;2-1.

BUBNA M, ROY S, SHENOY N, et al. A layout-aware physical design method for constructing feasible QCA circuits[C]//Proceedings of the 18th ACM Great Lakes symposium on VLSI. Orlando: ACM, 2008: 243-248. DOI: 10.1145/1366110.1366170.

FORMIGONI R E, FERREIRA R S, NACIF J A M. Ropper: a placement and routing framework for field-coupled nanotechnologies[C]//Proceedings of 2019 32nd Symposium on Integrated Circuits and Systems Design. Sao Paulo: IEEE, 2019: 1-6. DOI: 10.1145/3338852.3339838.

LENT C S, TOUGAW P D. A device architecture for computing with quantum dots[J]. Proceedings of the IEEE, 1997, 85(4): 541-557. DOI: 10.1109/5.573740.

KIM K, WU K J, KARRI R. Quantum-dot cellular automata design guideline[J]. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2006, E89-A(6): 1607-1614. DOI:10.1093/ietfec/e89-a.6. 1607.

WALTER M, WILLE R, TORRES F S, et al. Scalable design for field-coupled nanocomputing circuits[C]//Proceedings of the 24th Asia and South Pacific Design Automation Conference. Tokyo: ACM, 2019: 197-202. DOI: 10.1145/3287624.3287705.

CAMPOS C A T, MARCIANO A L, NETO O P V, et al. USE: a universal, scalable, and efficient clocking scheme for QCA[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016, 35(3): 513-517. DOI: 10.1109/TCAD.2015.2471996.

RAVICHANDRAN R, LADIWALA N, NGUYEN J, et al. Automaticcell placement for quantum-dot cellular automata[C]//Proceedings of the 14th ACM Great Lakes symposium on VLSI. Boston: ACM, 2004: 332-337. DOI: 10.1145/988952.989033.

CHUNG W J, SMITH B, LIM S K. Node duplication and routing algorithms for quantum-dot cellular automata circuits[J]. IEEE Proceedings-Circuits, Devices and Systems, 2006, 153(5): 497-505. DOI: 10.1049/ip-cds:20050278.

JANEZ M, PECAR P, MRAZ M. Layout design of manufacturable quantum-dot cellular automata[J]. Microelectronics Journal, 2012, 43(7): 501-513. DOI: 10.1016/j.mejo.2012.03.007.

ANTONELLI D A, CHEN D Z, DYSART T J, et al. Quantum-dot cellular automata (QCA) circuit partitioning: problemmodeling and solutions[C]//Proceedings of the 41st annual Design Automation Conference. San Diego: ACM, 2004: 363-368. DOI: 10.1145/996566.996671.

HENNESSY K, LENT C S. Clocking of molecular quantum-dot cellular automata[J]. Journal of Vacuum Science % Technology B: Microelectronics and Nanometer Structures, 2001, 19(5): 1752-1755. DOI: 10.1116/1.1394729.

VANKAMAMIDI V, OTTAVI M, LOMBARDI F. Two-dimensional schemes for clocking/timing of QCA circuits[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2008, 27(1): 34-44. DOI: 10.1109/TCAD.2007.907020.

WALTER M, WILLE R, GROβE D, et al. An exact method for design exploration of quantum-dot cellular automata[C]//Proceedings of 2018 Design, Automation % Test in Europe Conference % Exhibition (DATE). Dresden: IEEE, 2018: 503-508. DOI: 10.23919/DATE.2018.8342060.

SOEKEN M, RIENER H, HAASWIJK W, et al. The EPFL logic synthesis libraries[J]. arXiv preprint arXiv: 1805.05121, 2018.

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