何国强, 汪智勇. 面向高性能计算的多通道交织存储架构设计[J]. 现代雷达, 2017, 39(8): 37-42.

HE Guoqiang, WANG Zhiyong. A Design of Multi-channel Memory Architecture with Address Interleaving for High Performance Computing[J]. Modern Radar, 2017, 39(8): 37-42.

何国强, 汪智勇. 面向高性能计算的多通道交织存储架构设计[J]. 现代雷达, 2017, 39(8): 37-42. DOI：

HE Guoqiang, WANG Zhiyong. A Design of Multi-channel Memory Architecture with Address Interleaving for High Performance Computing[J]. Modern Radar, 2017, 39(8): 37-42. DOI：