To obtain bandgap reference voltage with high PSRR

high precision

and low temperature coefficient and meanwhile reduce the influence of non-ideal factors in the process

a piecewise curvature compensated bandgap reference circuit with a trimming procedure was proposed. The current with positive and negative temperature coefficients was generated by utilizing the resistor divider and the electrical characteristics of the MOSFET operating in the subthreshold region. The bandgap reference voltage was compensated at high temperature and low temperature respectively. A new chip-level trimming method including temperature coefficient trimming and voltage amplitude trimming for rapidly optimizing the reference voltage temperature coefficient

which can quickly acquire the code value of the lowest temperature coefficient curve and improve work efficiency. Based on 0.35 μm Bipolar-CMOS-DMOS (BCD) process

the chip was taped out to verify the feasibility of the trimming scheme. Simulation and test results show that: from -40℃ to 125℃

the lowest simulated reference voltage temperature coefficiency was 0.84×10-6/℃

the lowest measured temperature coefficiency was 5.33×10-6/℃

and the average temperature coefficiency was 7.47×10-6/℃ according to ramdom sampling. The average trimming times for ten chips was 3.5 by using the method based on calculating the slope. The efficiency was improved by 59.8％ compared with the method of successive approximation. The bandgap reference voltage with low temperature coefficient is helpful to improve the accuracy of the battery management chip in estimating battery residual power. This circuit has been successfully applied to high precision analog-to-digital converter in battery management chips.