To prevent the aero-engine from over-speed

an autonomous over-speed protection system based on field-programmable gate array(FPGA) was proposed. The protection strategy

over-speed realization and fault detection of system were presented. A double dual-redundancy protection structure was employed to ensure system stability. Over-speed protection was enhanced by linear classifier and weighted voting mechanism with sliding window. A three-layered built-in-test (BIT) technique was developed to monitor the fail-silent process and meet the airworthiness requirement. The protection system was testified based on extensive experimental results through hardware-in-the-loop tests

demonstrating that the proposed protection system is able to determine the over-speed with high accuracy and reliability

and lock the protection status against the consecutive over-speed effectively to prevent the structural failure of the aero-engine. The system has been successfully applied into a certain type of full authority digital engine control (FADEC) system.