1.广东工业大学 信息工程学院 先进光子技术研究院, 广州 510006
2.广东工业大学 通感融合光子技术教育部重点实验室, 广州 510006
3.广东工业大学 广东省信息光子技术重点实验室, 广州 510006
4.中山大学 电子与信息工程学院, 广州 510275
5.中山大学 广东省光电信息处理芯片与系统重点实验室, 广州 510275
张志涛,2112303210@mail2.gdut.edu.cn
高震森,gaozhensen@gdut.edu.cn
收稿:2025-10-07,
修回:2025-12-29,
录用:2026-01-14,
纸质出版:2026-03-25
移动端阅览
张志涛,邹本尧,侯鹏,等. 基于波特率采样时钟恢复与自适应均衡的低复杂度短距光互连DSP研究[J].光子学报,2026,55(3):0306001
ZHANG Zhitao, ZOU Benyao, HOU Peng, et al. Low-complexity DSP Scheme Based on Baud-rate Clock Recovery and Adaptive Equalization for Short-reach Optical Interconnects[J]. Acta Photonica Sinica, 2026, 55(3):0306001
张志涛,邹本尧,侯鹏,等. 基于波特率采样时钟恢复与自适应均衡的低复杂度短距光互连DSP研究[J].光子学报,2026,55(3):0306001 DOI: 10.3788/gzxb20265503.0306001. CSTR: 32255.14.gzxb20265503.0306001.
ZHANG Zhitao, ZOU Benyao, HOU Peng, et al. Low-complexity DSP Scheme Based on Baud-rate Clock Recovery and Adaptive Equalization for Short-reach Optical Interconnects[J]. Acta Photonica Sinica, 2026, 55(3):0306001 DOI: 10.3788/gzxb20265503.0306001. CSTR: 32255.14.gzxb20265503.0306001.
提出一种基于波特率采样的低复杂度接收端数字信号处理方案,通过分路式时钟恢复与可配置抽头两级自适应均衡器级联实现。时钟恢复采用改进型时钟恢复算法,在有效矫正采样偏差的同时,自然地补偿同相/正交支路偏移;随后在准确时钟同步的基础上,使用两级实数值多输入多输出自适应均衡,通过灵活配置均衡器抽头数从而进一步降低计算复杂度。仿真结果表明,在存在同相/正交支路偏移的条件下,该方案仍能保持稳定的误码率性能,并将均衡器所需的实数乘法器数量减少约50%。与传统两倍过采样方案相比,本方案以微小的接收光功率灵敏度为代价,显著降低了系统计算复杂度。
With the rapid development of cloud computing and large language models, global mobile data traffic has experienced exponential growth, imposing higher demands on data center interconnection technologies. To achieve high-speed data transmission at 800 Gbit/s, coherent optical communication with high spectral efficiency and support for advanced modulation formats has emerged as a key solution for short-reach optical interconnects. However, traditional coherent receivers are hindered by high Digital Signal Processing (DSP) complexity, which makes it difficult to meet stringent power and cost requirements. To address this, this paper proposes a low-complexity DSP scheme based on baud-rate sampling, which reduces computational complexity while maintaining performance for short-reach coherent optical communications.
The proposed DSP architecture integrates a baud-rate clock recovery module with a two-stage adaptive equalizer, both designed for low complexity. The clock recovery module employs a split-path design comprising four independent units, each utilizing a sign-MM Timing Phase Error Detection (TPED) algorithm. Operating at the symbol rate, this module uses a sign function to extract timing errors from signal polarity changes. This approach enables robust compensation of Sampling Clock Offsets (SCO) and In-phase/Quadrature (
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) skew without requiring carrier recovery. Subsequently, a Two-stage Real-valued Multi
ple Input Multiple Output (RV-MIMO) adaptive equalizer is applied. Its tap configuration is flexible: the first stage uses
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main taps to mitigate intra-polarization impairments, such as chromatic dispersion and inter-symbol interference, while the second stage includes
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cross-term taps and a 4×4 RV-MIMO with
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taps to handle residual inter-polarization crosstalk and polarization demultiplexing. This tunable structure allows the equalizer's complexity to be dynamically adjusted based on channel conditions, thereby optimizing the performance-complexity balance.
Simulation results under a 56 GBaud dual-polarization 16QAM transmission over 2 km standard single-mode fiber demonstrate the effectiveness of the proposed scheme. The sign-MM TPED exhibits robust performance against impairments such as carrier frequency offset and phase noise, with timing jitter remaining below -45 dB under various conditions. The two-stage equalizer reliably achieves Bit Error Rate (BER) performance below the hard-decision forward error correction threshold, even in the presence of IQ skew. Compared to conventional oversampling-based DSP schemes, the proposed approach reduces the number of real multipliers required in the equalizer by approximately 50%. This complexity reduction is achieved with only minor penalties of 0.4 dB in Optical Signal-to-Noise Ratio(OSNR) tolerance and 1.1 dB in Received Optical Power(ROP) sensitivity.
In summary, this work presents a low-complexity DSP solution for short-reach coherent optical interconnects, using baud-rate sampling to significantly reduce computational complexity while maintaining performance. The integrated architecture, which combines
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-independent clock recovery with a configurable-tap adaptive equalizer, enhances robustness against
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skew and sampling offsets, making it suitable for data center applications. These attributes collectively make the scheme a practical and efficient candidate for high-speed, power-and cost-sensitive applications such as intra-data center interconnects.
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唐剑威 . 相干光通信系统中数字反馈时钟恢复算法的优化设计 [D]. 武汉 : 华中科技大学 , 2023 : 1 - 84 .
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