The structure and implemention of a high speed and mass storage system based on NAND flash memory and FPGA is introduced
and the hardware stmction and software flowchart are presented. Based on the analysis of the structure and characteristics of the flash chip
High-Band-Buses and Pipeline technique are applied to realize high speed storage
and the ECC method are used and invalid blocks of the flash chips are masked automatically to improve the reliability of the storage system. The practice proved that the system is stable in operation and has the advantage of high speed