Digital hearing aid as a portable product requires low power consumption. With the continuous improvement and increase of functionality

the design should also offers great flexibility and high computing performance.ASIC solution lacks flexibility.GPP solution may not meet the requirement of power consumption. Application Specific Instruction Set Processor (ASIP) can offer higher computing performance

lower power consumption and greater flexibility. Through analyzing the algorithm of digital hearing aid system

customized instruction set extensions and dedicated hardware accelerators were added.Several software and hardware power optimization techniques were also adopted at the various levels of the design.The optimized ASIP can meet the low power consumption and high flexibility requirements of digital hearing aid system well.The ASIP design for digital hearing aids was implemented in TSMC 130 nm process.When the system works at 8 M Hz clock frequency

the power dissipation is 0.963 mW at 1.2 V supply voltage.