A low power test vectors generation method with high fault coverage is presented in this paper

which aims at power dissipation and fault coverage in combinational circuits using BIST way.The proposed method firstly uses the vectors generation tool of Atalanta to generate the test vectors with high fault coverage

then achieves the low power vectors by utilizing the way of inserting the single switching activities vectors and the theory of configurable LFSR to generate the deterministic test vectors.Experimental results based on the ISCAS85 benchmark circuit vertify the effectiveness by using this method.