An unified architecture of DSP plus general-purpose CPU is proposed in this paper.A 4-core homogeneous processor based on the unified architecture is implemented.The processor is designed based on the VLIW architecture and can support maximum 8-instruction parallel dispatch.The DSP instruction set is designed independently and the CPU instruction set is compatible with the MIPS 4KC instruction set.The processor merged the DSP and CPU functions in one unified architecture without changing the existent CPU execution sequence.This architecture makes the processor suitable for broadband communication and multimedia embedded applications.The program can be dispatched parallel by the parallel bits in DSP instruction or by a designedparalinkprefix instruction.In this 4-core architecture

we performed a globally read locally write strategy to control the chip scale.The results of the simulation and chip test show that the architecture we performed is feasible and have its advantage in broadband communication and multimedia application.