1. 复旦大学 专用集成电路与系统国家重点实验室 机构,上海,201203
2. 中国人民解放军 66005部队,天津,300300
3. 解放军信息工程大学,河南,郑州,450002
纸质出版:2016
移动端阅览
李伟, 李洋, 陈帆. 基于共享存储器的密码多核处理器核间通信机制研究与设计[J]. 微电子学与计算机, 2016, 33(1): 19-23.
LI Wei, LI Yang, CHEN Fan. Research and Implementation of Communication Mechanism Among Cores Based on Shared Memory for Cryptographic Multi-core Processor[J]. 2016, 33(1): 19-23.
为有效解决多核密码处理器中核间通信对密码处理性能制约的问题
研究了分组、序列、杂凑密码算法多核处理过程中核间通信的特点.依托分簇式的密码多核处理器
提出了基于共享存储器的硬件结构
能够有效支持256 bit以内的任意数据位宽的核间通信传输.提出了基于自选锁邮箱的同步器硬件结构
具备加1、置数、乒乓同步等功能.结合此共享存储器与同步器结构
提出了基于共享存储器的密码多核处理器核间通信机制.基于65 nm CMOS工艺库
对共享存储器与同步器进行了实现
实验结果表明
提出的核间通信机制具有硬件开销小、同步效率高的特点
2个时钟周期能够完成4个处理器核对于4组256 bit数据的核间通信与同步操作
相比其他核间通信方式
具有明显的优势.
In order to solve the problem that communication mechanism among cores cannot satisfy the high speed cryptographic operations demand
this paper analyzed the communication characteristic of block
stream and hash cryptographic algorithms in the multi-core processor. Based on the multi-cluster structure
this paper proposed a new structure of shared memory
which could support communication among cores of random data width under 256bit. Besides
this paper proposed a way of email data synchronization which is based on improved spin lock. Each synchronization unit includes the function of add 1
. In the combination of shared memory and synchronization unit
this paper put forward the communication mechanism among cores based on shared memory. Based on the 65nm CMOS technology
the synthesis of shared memory and synchronization unit has been achieved
the result proves that our proposed the hardware area of communication mechanism among cores is small
the efficiency of data synchronization is high. The 256-bit data could be synchronized in two clock cycles among four processors
Comparing with other communication mechanisms
the communication mechanism get a better efficiency.
金晨辉, 张少武, 胡斌, 等. 密码学[M]. 北京: 高等教育出版社, 2007.
Burlington Massachusetts Dally W J, Towles B P. Principles and practices of interconnection networks[M]. Burlington Massachusetts: Morgan Kaufmann, 2004.
杨国芳. 多核处理器核间通信技术研究[D]. 哈尔滨: 哈尔滨工程大学, 2011.
Delfs H, Knebl H, 肖国镇, 等. 密码学导引: 原理与应用[M]. 北京: 清华大学出版社, 2008.
Hu W, Wang R, Chen Y, et al. Godson-3B: A 1GHz 40W 8-core 128GFlops processor in 65nm CMOS[C]//Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International. USA, San Francisco, IEEE, 2011: 76-78.
Yu Z, You K, Xiao R, et al. An 800MHz 320mW 16-core processor with message-passing and shared-memory inter-core communication mechanisms[C]//Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International. USA, San Francisco, IEEE, 2012: 64-66.
Bin Liu, Bevan M Baas. Parallel AES encryption engines for many-core processor arrays[J]. IEEE Transactions on Computers, 2013, 62(3): 536-547. DOI: 536
0
浏览量
13
下载量
0
CSCD
关联资源
相关文章
相关作者
相关机构
京公网安备11010602201714号