GF(2)域上的低功耗可配置ECC点乘算法ASIC设计实现

车光宁; 张钊锋

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GF(2)域上的低功耗可配置ECC点乘算法ASIC设计实现

更新时间：2026-09-04

- GF(2)域上的低功耗可配置ECC点乘算法ASIC设计实现
- Low Power Configurable ASIC Based Elliptic Curve Scalar Multiplication Over GF(2
- 微电子学与计算机 2018年35卷第1期页码：15-20
- 作者机构：
  
  1. 中国科学院机构上海高等研究院,上海,201210
  2. 中国科学院大学机构
  3. 上海科技大学机构信息科学与技术学院,上海,201210
- 作者简介：
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- 纸质出版：2018
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车光宁, 张钊锋. GF(2)域上的低功耗可配置ECC点乘算法ASIC设计实现[J]. 微电子学与计算机, 2018, 35(1): 15-20.

CHE Guang-ning, ZHANG Zhao-feng. Low Power Configurable ASIC Based Elliptic Curve Scalar Multiplication Over GF(2[J]. 2018, 35(1): 15-20.
车光宁, 张钊锋. GF(2)域上的低功耗可配置ECC点乘算法ASIC设计实现[J]. 微电子学与计算机, 2018, 35(1): 15-20. DOI：

CHE Guang-ning, ZHANG Zhao-feng. Low Power Configurable ASIC Based Elliptic Curve Scalar Multiplication Over GF(2[J]. 2018, 35(1): 15-20. DOI：

摘要

针对射频识别(RFID)和无线传感网(WSN)等领域的高安全、低功耗、轻量化和可拓展等应用需求

设计一种GF (2)域上实现的椭圆曲线标量乘法电路.通过对椭圆曲线标量乘法整体架构实现进行逐层分级优化改进

尤其对标量乘核心模块——模乘和模逆进行了低功耗设计改进.经过Xilinx FPGA工具仿真和Synopsys Design Compiler工具验证

该椭圆曲线标量乘法架构灵活可拓展

GF (2)域上一次点乘运算仅需要138 k个时钟周期并且在TSMC 0.13 μm工艺下等效面积仅为11.9 k

相比较同类设计

面积和执行速度都有着效果显著的优势

可以胜任像RFID以及WSN一样资源受限的应用场合使用.

Abstract

Aiming at the design requirements of high security

low power consumption

light implementation and configurable requirements for radio frequency identification (RFID) and wireless sensor networks (WSN) applications

an elliptic curve scalar multiplication circuit is designed. Through the overall optimization of the whole architecture of the elliptic curve scalar algorithm layer by layer

especially for the lower power design of the core scalar module: modular multiplication and inversion. Through the Xilinx FPGA tool simulation and the comprehensive verification of Design Compiler tools of Synopsys

the scalar multiplication architecture is proved flexible and expandable

one elliptic curve scalar point multiplication over GF(2) is only 138 k clock cycles and the equivalent gate area with TSMC 0.13 μm is only 11.9 k

compared with similar designs

the area and the implementation of the speed has a significant advantage

it can be used for RFID、WSN and other resource-constrained applications.

关键词

Keywords

references

Khan Z U A, Benaissa M. High speed ECC implementation on FPGA over GF (2m)[C]//Field Programmable Logic and Applications (FPL), 2015 25th International Conference on. London, UK, IEEE, 2015: 1-6.

Montgomery P L. Speeding the pollard and elliptic curve methods of factorization[J]. Mathematics of computation, 1987, 177(48): 243-264. DOI: 243

Lee Y K, Sakiyama K, Batina L, et al. Elliptic-curve-based security processor for RFID[J]. IEEE Transactions on Computers, 2008, 57(11): 1514-1527. DOI: 1514

Liu Z, Liu D, Zou X, et al. Design of an elliptic curve cryptography processor for RFID tag chips[J]. Sensors, 2014, 14(10): 17883-17904. DOI: 17883

Li L, Li S. High-Performance pipelined architecture of elliptic curve scalar multiplication over GF (2m)[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24(4): 1223-1232. DOI: 1223

Hankerson D, Menezes A, Vanstone S. Guide to elliptic curve cryptography[J]. Springer, 2004, 22(3): 98-101. DOI: 98

Sutter G D, Deschamps J P, Imaña J L. Efficient elliptic curve point multiplication using digit-serial binary field operations[J]. IEEE Transactions on Industrial Electronics, 2013, 60(1): 217-225. DOI: 217

Azarderakhsh R, Jarvinen K U, Mozaffari-Kermani M. Efficient algorithm and architecture for elliptic curve cryptography for extremely constrained secure applications[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2014, 61(4): 1144-1155. DOI: 1144

魏国珩, 汪亚, 张焕国. 面向RFID应用的GF (2m)域上ECC点乘运算的轻量化改进研究[J]. 计算机工程与科学, 2017, 39(1): 81-85. DOI: 81

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