Hubert G, Truyen D, Artola L, et al. SET and SEU analyses based on experiments and multi-physics modeling applied to the atmel cmos library in 180 and 90-nm technological nodes[J]. IEEE Trans. Nucl. Sci., 2014, 61(6): 1558-1578. DOI: 1558

HE YiBai, CHEN ShuMing. Comparison of heavy-ion induced SEU for D- and TMR-flip-flop designs in 65-nm bulk CMOS technology[J]. Science China Information Sciences, 2014, 57(10): 1-7. DOI: 1

常克武、王海涛、张弓, 等. 一种基于FPGA的抗辐射加固星载ASIC设计方法[J]. 航天器工程, 2016, 25 (4) : 74-80. DOI: 74

Paolo Rech, lessandro Paccagnella, Ichelangelo Grosso, et al. Evaluating the Impact of DfM library optimizations on alpha-induced seu sensitivity in a microprocessor core[J]. IEEE Trans. Nucl. Sci., 2010, 57(4): 2098-2105. DOI: 2098

Kubota K, Masuda M, Furuta J. A low-power and area-efficient radiation-hard redundant flip-flop, DICE ACFF, in a 65 nm thin-BOX FD-SOI[C]//2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS). Oxford, England, 2013.

饶全林, 何春, 饶青, 等. 一款雷达信号处理SOC芯片的存储器内建自测试设计[J]. 微电子学与计算机, 2008, 25(7): 95-99. DOI: 95

杨斌, 王小力, 李栋. 嵌入式存储器修复技术研究[J]. 微电子学与计算机, 2015, 32 (5) : 63-67. DOI: 63