Lee J, Park P, Cho S H, et al. A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs [C]// International Solid-State Circuits Conference (ISSCC). San Francisco, CA, USA: IEEE press, 2015: 1-3.

Sundaresan K, Allen P E, Ayazi F. Process and temperature compensation in a 7-MHz CMOS clock oscillator [J]. IEEE Journal of Solid-State Circuits, 2006, 41(2): 433-442. DOI: 433

Tsubaki K, Hirose T, Kuroki N, et al. A 32.55kHz, 472nW, 120ppm/℃, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application [C]// European Solid-State Circuits Conference (ESSCIRC). Bucharest, Romania: IEEE Press, 2013: 315-318.

毕查德·拉扎维. 模拟CMOS集成电路设计[M]. 西安: 西安交通大学出版社, 2013.

Li Y, Wang Y, Yan N, et al. A subthreshold MOSFET bandgap reference with ultra-low power supply voltage [C]// International Conference on ASIC (ASICON). Xiamen, China: IEEE Press, 2011: 862-865.

Ueno K, Asai T, Amemiya Y. A 30MHz, 90ppm/℃ fully-integrated clock reference generator with frequency-locked loop [C]// European Solid-State Circuits Conference (ESSCIRC). Athens, Greece: IEEE Press, 2009: 392-395.

Tokunaga Y, Sakiyama S, Matsumoto A, et al. An on-chip CMOS relaxation oscillator with voltage averaging feedback [J]. IEEE Journal of Solid-State Circuits, 2010, 45(6): 1150-1158. DOI: 1150

Shihabudheen T, Babu V S, Baiju M R. A low power sub 1V 3.5ppm/℃ voltage reference featuring subthreshold MOSFETs[C]// International Conference on Electronics Circuits and Systems (ICECS). St. Julien's, Malta: IEEE Press, 2008: 442-445.