北京理工大学信息与电子学院 北京市硅基高速片上系统工程技术研究中心,北京,100081
纸质出版:2018
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武照博, 王兴华, 王征晨. 一种高频LC-VCO相位噪声的分析方法[J]. 微电子学与计算机, 2018, 35(4): 63-67.
WU Zhao-bo, WANG Xing-hua, WANG Zheng-chen. A Phase Noise Analysis Method for High Frequency LC-VCO[J]. 2018, 35(4): 63-67.
基于25.2 GHz整数电荷泵锁相环(CPPLL)的设计需求
采用TSMC90 nm CMOS工艺设计了一款中心谐振频率为25.2 GHz的低相位噪声LC压控振荡器.采用单平衡混频器的工作原理
重点分析并建立了关于尾电流源的相位噪声的数学模型
同时进行了合理优化.经过仿真及测试验证
压控振荡器的谐振频率范围为22.77~28.5 GHz
相位噪声为-100 dBc/Hz@1 MHz
电路功耗为15 mA.
Based on the design requirement of the 25.2 GHz integer charge pump phase-locked loop (CPPLL)
a low-phase noise LC voltage-controlled oscillator with a center resonant frequency of 25.2 GHz was designed by using the TSMC90 nm CMOS process. Based on the working principle of single-balanced mixer
the mathematical model of phase noise of tail current source was analyzed and established and reasonably optimized. The simulation and measure results indicated that the LC voltage-controlled oscillator had a resonant frequency range of 22.75~28.5 GHz
whose phase noise was -100 dBc/Hz@1 MHz
and the circuit power consumption was15 mA.
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