1. 中国科学院 机构 微电子研究所,北京,100029
2. 中国科学院大学 机构,北京,101408
3. 中国科学院 硅器件技术重点实验室,北京,100029
纸质出版:2018
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王荣超, 王立新, 邢心润, 王琳, 罗家俊. 一种600V高压超结VDMOS结构设计与优化[J]. 微电子学与计算机, 2018, 35(11): 67-72.
WANG Rong-chao, WANG Li-xin, XING Xin-run, et al. Design and Optimization of 600V High Voltage Super-Junction VDMOS[J]. 2018, 35(11): 67-72.
基于电荷补偿原理的超结VDMOS(Super-Junction VDMOS
SJVDMOS)器件
比传统的VDMOS具有更低的比导通电阻
更高的击穿电压.文中详细介绍了超结VDMOS元胞设计步骤
之后借助TCAD仿真对超结VDMOS的击穿电压和比导通电阻进行了深入优化
探究了电荷不平衡、漂移区厚度、衬底反向扩散以及表面结构等对击穿电压和比导通电阻的影响.对元胞结构的优化使得超结VDMOS由最初的击穿电压为587 V
比导通电阻为7.27 mΩ·cm
优化到最终的击穿电压为662.5V
比导通电阻为6.85mΩ·cm
性能得到明显改善.
Based on the charge compensation principle
the super junction VDMOS (Super-Junction VDMOS
SJVDMOS) device has lower specific on-resistance and higher breakdown voltage than the traditional VDMOS. This paper introduces the super junction VDMOS cell design steps in detail. The TCAD is used to simulate the breakdown voltage and the specific on-resistance of super-junction VDMOS. The effects of charge imbalance
drift zone thickness
substrate back diffusion and surface structure on the breakdown voltage and specific on-resistance are investigated. The optimization of cell structure improves the performance of the super junction VDMOS obviously. The initial breakdown voltage improves from 587V to 662.5V
and the specific on-resistance declines from 7.27 mΩ·cm to 6.85 mΩ·cm.
Kondekar P N, Parikh C D, Patil M B. Analysis of breakdown voltage and on resistance of super junction power MOSFET CoolMOS TM, using theory of novel voltage sustaining layer[C]// Power Electronics Specialists Conference, 2002. Pesc 02. 2002 IEEE. IEEE, 2002: 1769-1775.
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Chen X B, Sin J K O. Optimization of the specific on-resistance of the COOLMOS TM[J]. IEEE Trans Electron Devices, 2001, 48(2):344-348. DOI: 344
EDEN R. Power Semiconductor Forecast Report - 2016[M]. https://technology.ihs.com/580305/power-semiconductor-forecast-report-2016. 2016.
陈星弼.超结器件[J].电力电子技术, 2008, 42(12): 2-7. DOI: 2
黄海猛.超结器件的模型研究及优化设计[D].成都: 电子科技大学, 2013.
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