上海交通大学 微纳电子学系,上海,200240
纸质出版:2019
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顾家威, 孙亚男, 何卫锋. 基于多值RRAM的高能效非易失性SRAM设计[J]. 微电子学与计算机, 2019, 36(9): 21-25.
GU Jia-wei, SUN Ya-nan, HE Wei-feng. Energy-efficient nonvolatile SRAM design based on mltilevel RRAM[J]. 2019, 36(9): 21-25.
针对常关即开型应用
本文利用RRAM的多值存储特性
提出了一种基于多值RRAM (MLC)的高能效非易失性SRAM (nvSRAM)单元电路.通过引入新型的多比特数据备份电路
本文提出的MLC-nvSRAM单元实现了将2-bit SRAM数据值同时备份到一个四值RRAM中
明显减小了电路中RRAM的器件个数和平均写入电流
进而有效降低了数据备份能耗.仿真结果表明
与传统基于单值RRAM的SLC-nvSRAM单元相比
所提出的MLC-nvSRAM单元在保持正常SRAM高读写性能的基础上
数据备份能耗和系统盈亏时间的降幅分别高达76.80%和74.01%.
A novel energy-efficient nonvolatile static random access memory(nvSRAM)design utilizing the multi-level cell(MLC)characteristics of resistive RAM(RRAM)cell is proposed for frequent-off and instant-on applications. The multi-bit data store circuitry is designed to enable the storage of every two-bit SRAM data into a single 4-level MLC-RRAM to achieve low store energy with reduced number and suppressed average write current of RRAM devices. Simulation results show that high data access speed is maintained with the proposed MLC-nvSRAM circuit when performing the SRAM operations. As compared to the previously published SLC-nvSRAM cells
the store energy and break-even time of the proposed MLC-nvSRAM cell are reduced by up to 76.80% and 74.01%
respectively.
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